1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor memory device and a method for fabricating the same. Although the present invention is suitable for a wide scope of applications, it is particularly suitable for forming a capacitor using a high dielectric film for a 256 MB DRAM or a higher integrated semiconductor memory device.
2. Discussion of the Related Art
It is desirable to reduce the thickness of the dielectric film to compensate for decreases in the capacitance which results from a decrease in capacitor area due to high packing density, for example. However, a leakage current caused by tunneling effect in the area of thin dielectric layer is often problematic. Such leakage current degrades a reliability of the device.
To avoid such a problem, a storage node in the capacitor is formed with very complicated folded surface to increase an effective area. In addition, a stack of nitride/oxide films is used as the dielectric film to form a thin film capacitor. However, it is difficult to apply the above methods to highly-packed devices such as a 256 MB or higher DRAM because of great step coverage that makes photolithography difficult and fabricating cost too high. To cope with these problems, using a high dielectric layer for the capacitor is suggested to improve capacitance as well as to reduce the complicated folded surface.
Ta.sub.2 O.sub.5 has been the most researched dielectric material for a capacitor among the many dielectric materials. The researches on the Ta.sub.2 O.sub.5 were quite successful in forming a thinner film and improving dielectric characteristics and packing density. However, Ta.sub.2 O.sub.5 is not a better candidate for a capacitor because its dielectric constant is not high enough for higher integrated semiconductor devices. Accordingly, a dielectric material other than Ta.sub.2 O.sub.5, such as a perovskite type oxide, is of great interest because of its high dielectric constant. Particularly, the perovskite type oxide has become a subject of intensive research for a dielectric film in semiconductor devices.
Examples of the perovskite type oxide include PZT[Pb(Zr, Ti)O.sub.3 ], PLZT[(Pb,La) (Zr,Ti)O.sub.3 ], BST[((Ba,Sr)TiO.sub.3 ], BaTiO.sub.3, and SrTiO3. However, these materials tend to have an active chemical reaction with silicon or polysilicon and oxidize storage nodes under a strong oxidating ambient during the fabrication process. Therefore, there are problems yet to be solved in an actual integration process especially in designs and materials to be used for electrodes.
A conventional semiconductor memory device of a high dielectric film and a method for fabricating the same will now be explained with reference to FIG. 1.
FIG. 1 is a cross-sectional view of the conventional semiconductor memory device. As shown in FIG. 1, the conventional semiconductor device includes an insulating film 2 having a node contact hole 3 in a semiconductor substrate 1, a source (or drain) region (not shown) on the substrate, a polysilicon plug 4 in the node contact hole 3, a diffusion barrier metal 5 on a top portion of the polysilicon plug 4 and a portion of the insulating film 3, a lower electrode 6 on the diffusion barrier metal 5, a dielectric film 7 on a portion of the insulating film 3 and covering a stack of the lower electrode 6 and the barrier metal 5, and an upper electrode 8 on the dielectric film 7.
A method for fabricating a conventional semiconductor memory device will be explained with reference to FIGS. 2a-2d.
FIGS. 2a-2d are cross-sectional views illustrating the process steps for fabricating a conventional semiconductor device.
Referring to 2a, an insulating film 2 including a gate electrode (not shown) is formed on a semiconductor substrate 1 having a source (or drain) region (not shown), and the insulating film 2 is selectively patterned (by photolithography and etching process) to form a node contact hole 3 contacting the source(or drain) region.
Referring to FIG. 2b, a polysilicon plug 4 is selectively formed in the node contact hole 3.
Referring to FIG. 2c, a diffusion barrier metal 5 and a lower electrode 6 are formed on entire surfaces of the polysilicon plug 4 and the insulating film 2. Then, the diffusion metal 5 and the lower electrode 6 are patterned selectively to form an area for a storage node. The barrier metal 5 can be formed from either Tantalum(Ta) or Titanium Nitride(TiN) as a conductive material. If a high strength dielectric film is directly formed on the polysilicon film without the barrier metal, a silicon oxide film is formed at the interface of the high dielectric film and the polysilicon film. The barrier metal prevents the silicon from diffusing into the lower electrode used as the storage node. A diffused silicon increases an inherent resistance of the lower electrode and forms a thin oxide film on the upper portion of the lower electrode, thereby degrading performance of the high dielectric film. Thus, for the purpose of preventing the aforementioned disadvantages, the barrier metal is formed between the lower electrode 6 and the polysilicon plug 4. Also, a platinum electrode is used as the lower electrode 6 to suppress a leakage current.
Referring to FIG. 2d, the high dielectric film is formed on a stacked surface of the lower electrode 6 and the barrier metal 5. Then, an upper electrode 8 is formed on an entire surface of the high dielectric film to form a capacitor in the conventional semiconductor memory device. The high dielectric film includes a material having a high dielectric constant such as a PZT [Pb(Zr,Ti)O.sub.3 ] and a BST [(Ba,Sr)TiO.sub.3 ].
In the aforementioned conventional semiconductor memory device, a high dielectric film (for example, a BST having a dielectric constant of about 2000) is used together with the platinum electrode which suppresses leakage current so that a good device characteristics is achieved in semiconductor memory devices, particularly in a 256 MB or higher DRAM.
Although the barrier metal between the lower electrode and the polysilicon plug prevents the silicon from diffusing into the lower electrode, sides of the barrier metal in contact with the high dielectric film provide paths for a leakage current. Therefore, even if the barrier metal is formed on the polysilicon plug, there is still a reliability problem in integrated semiconductor memory devices with high packing density such as a 256 MB or higher DRAM.